The present invention is directed to integrated circuits and their processing for the manufacture of semiconductor devices. More particularly, the invention provides a method for manufacturing a half tone phase shift mask for the manufacture of advanced integrated circuits such as dynamic random access memory devices, static random access memory devices (SRAM), application specific integrated circuit devices (ASIC), microprocessors and microcontrollers, Flash memory devices, and others.
Integrated circuits or “ICs” have evolved from a handful of interconnected devices fabricated on a single chip of silicon to millions of devices. Current ICs provide performance and complexity far beyond what was originally imagined. In order to achieve improvements in complexity and circuit density (i.e., the number of devices capable of being packed onto a given chip area), the size of the smallest device feature, also known as the device “geometry”, has become smaller with each generation of ICs. Semiconductor devices are now being fabricated with features less than a quarter of a micron across.
Increasing circuit density has not only improved the complexity and performance of ICs but has also provided lower cost parts to the consumer. An IC fabrication facility can cost hundreds of millions, or even billions, of dollars. Each fabrication facility will have a certain throughput of wafers, and each wafer will have a certain number of ICs on it. Therefore, by making the individual devices of an IC smaller, more devices may be fabricated on each wafer, thus increasing the output of the fabrication facility. Making devices smaller is very challenging, as each process used in IC fabrication has a limit. That is to say, a given process typically only works down to a certain feature size, and then either the process or the device layout needs to be changed.
An example of such a limit is an ability to manufacture the masks that are used in performing lithography for the manufacture of integrated circuits. A commonly used mask is called a phase shift mask. Phase shift masks have been used to print feature sizes of less than 0.25 microns using interference patterns from illumination sources. Unfortunately, conventional processes to manufacture phase shift masks have become difficult to perform in an efficient and accurate manner. Additionally, conventional processes seem to be cumbersome and cause quality problems in the masks themselves. These and other limitations are described throughout the present specification and more particularly below.
From the above, it is seen that an improved technique for processing semiconductor devices is desired.